QJ71C24N RS-232C Report

Audience: maintainers and users who need the current validated view of the QJ71C24N path.

This page is the single report for this hardware target.

Target

• PLC CPU: Mitsubishi Q-series Q06UDVCPU
• Serial module: QJ71C24N
• Link: RS-232C
• Settings: 19200 / 8E2 / MC Protocol Format5 Binary / sum-check on / station 0
• Practical family selection: ql

Summary

Area	Current status	Notes
CPU identification	pass	cpu-model returns Q06UDVCPU, 0x0368
Contiguous read/write	pass	bring-up and soak passed
Supported-device soak	pass	one 180 second run passed
Native 0403	pass	validated on the current setup
Native 1402 words	pass	validated with restore on the current setup
Native 1402 bits	pass	validated with restore on the current setup
Native 0406/1406	pass	validated with restore on the current setup
Native 0801/0802	pass	validated on the current setup
Host buffer read	pass	probe-host-buffer passed
Host buffer write	pass	writable verification starts at 2; start 0/1 stayed unchanged on this target
Module buffer read/write	pass	practical path validated
Qualified helper access	pass, narrow scope	helper U3E0\\G10=0x1000; helper U3E0\\HG20 read/write/restore passed
Native qualified access	unsupported / not applicable	helper-only is the supported path; native U3E0\\G10=0x4030; native HG path is not applicable under --series ql

The canonical matrix is HARDWARE_VALIDATION.md.