Audience: maintainers and users who need the current validated view of the LJ71C24 path.

This page is the single report for this hardware target.

Target

PLC CPU: Mitsubishi L-series L26CPU-BT
Serial module: LJ71C24
Link: RS-232C
Settings: 28800 / 8E2 / MC Protocol Format5 Binary / sum-check on / station 0
Practical family selection: ql

Summary

Area	Current status	Notes
CPU identification	pass	`cpu-model` returns `L26CPU-BT`, `0x0542`
Contiguous read/write	pass	supported-device screening `25/25` passed
Supported-device soak	pass	two `180` second runs passed
Native `0403`	pass	validated on the current setup
Native `1402` words	pass	validated with restore on the current setup
Native `1402` bits	pass	validated with restore on the current setup
Native `0406/1406`	pass	validated with restore on the current setup
Native `0801/0802`	pass	validated on the current setup
Host buffer read	pass	`probe-host-buffer` passed
Host buffer write	pass	writable verification starts at `2`; `start 0/1` stayed unchanged on this target
Module buffer read/write	pass	practical path validated
Qualified helper access	pass, narrow scope	helper `U3E0\\G10=0x0000`; helper `U3E0\\HG20` read/write/restore passed
Native qualified access	unsupported / not applicable	helper-only is the supported path; native `U3E0\\G10=0x4030`; native `HG` path is not applicable under `--series ql`

Series Selection Note

On LJ71C24 + L26CPU-BT, --series ql is the practical setting. --series iqr is not a practical mode on this target because even contiguous D100 / M100 reads returned 0x7F22.

The canonical matrix is HARDWARE_VALIDATION.md.